URL https://opencores.org/ocsvn/pci_blue_interface/pci_blue_interface/trunk

Subversion Repositories pci_blue_interface

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Rev	Log message	Author	Age	Path
50	no message	bbeaver	8423d 21h	/
49	no message	bbeaver	8424d 02h	/
48	no message	bbeaver	8424d 03h	/
47	no message	bbeaver	8424d 19h	/
46	Continuing work on Master and Target. (Target mostly.)	bbeaver	8425d 05h	/
45	Added two-words-of-room flag to FIFO. (Not sure it is needed. Synthesis will remove it if not.) Started stubbing in the Target.	bbeaver	8428d 22h	/
44	Reorganized the Master State Machine to have 6 functions followed by a MUX. Started working on the Target State Machine.	bbeaver	8431d 00h	/
43	Trying to organize pci master tests by function, label them, to avoid duplication. Adding pci_target_test file, to start the work on the target side.	bbeaver	8431d 10h	/
42	trying to make master test framework easier to use	bbeaver	8431d 21h	/
41	odds and ends in the master. Parity mostly. Not debugged.	bbeaver	8432d 04h	/
40	more improvements to master	bbeaver	8432d 18h	/
39	Master Retries seem OK. Working on flushing, increasing test coverage.	bbeaver	8432d 23h	/
38	working on master.	bbeaver	8433d 21h	/
37	Getting Master Abort Timers to have correct values	bbeaver	8437d 22h	/
36	more progress onthe master side	bbeaver	8438d 08h	/
35	Made the compromise that the FIFOs and the PCI Bus will be the same width. No 32/64 combinations. Working on Master.	bbeaver	8439d 02h	/
34	Starting to remove extra logic in PCI Master	bbeaver	8445d 23h	/
33	Polishing the PCI Master.	bbeaver	8446d 21h	/
32	Starting to get simplified Master State Machine to do something. NOTE: This has not been optimized to fit into CLB's yet.	bbeaver	8451d 23h	/
31	Still messing with Master State Machine	bbeaver	8461d 00h	/

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Subversion Repositories pci_blue_interface

[/] - Rev 50

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