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15 Rust oscilloscope: thread for async input yannv 2795d 23h /
14 Streaming data input in Rust oscilloscope.

Next up: Non-blocking input.
yannv 2795d 23h /
13 Proof of concept Rust+Glium XY oscilloscope code.

To do: add input capability and proper time keeping.
yannv 2796d 20h /
12 Proof of concept XY plotting in HTML canvas

Performance on my workstation is just about fast enough.
Work on a means of feeding points in.
yannv 2797d 01h /
11 Rough xy oscilloscope display program.

Not actually usable, way too slow.
yannv 2798d 16h /
10 testtop: use a uart to send serial data yannv 2798d 18h /
9 Avoid unsigned port for PC. yannv 2798d 19h /
8 Avoid inout signal. yannv 2798d 19h /
7 Typo fix. yannv 2798d 19h /
6 Modified to use dual-port RAM for scanline buffers, instead of one RAM per scanline.
Note that XST fails to create dual-port RAM if write data on one port is constant!
Next step is to use generic_dpram from opencores common.
yannv 5026d 22h /
5 Add _i and _o suffixes to ports. yannv 5027d 00h /
4 Filled in some comments in vector2scanline.v.
My very first Verilog module, bear with me.
yannv 5039d 18h /
3 Unpacked source code for further development in svn. yannv 5039d 19h /
2 Added Mercurial bundle of pre-subversion source code. yannv 5039d 19h /
1 The project and the structure was created root 5040d 20h /

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