URL https://opencores.org/ocsvn/pdp1/pdp1/trunk

Subversion Repositories pdp1

[/] - Rev 15

Rev	Log message	Author	Age	Path
15	Rust oscilloscope: thread for async input	yannv	2695d 06h	/
14	Streaming data input in Rust oscilloscope. Next up: Non-blocking input.	yannv	2695d 06h	/
13	Proof of concept Rust+Glium XY oscilloscope code. To do: add input capability and proper time keeping.	yannv	2696d 03h	/
12	Proof of concept XY plotting in HTML canvas Performance on my workstation is just about fast enough. Work on a means of feeding points in.	yannv	2696d 08h	/
11	Rough xy oscilloscope display program. Not actually usable, way too slow.	yannv	2697d 23h	/
10	testtop: use a uart to send serial data	yannv	2698d 01h	/
9	Avoid unsigned port for PC.	yannv	2698d 02h	/
8	Avoid inout signal.	yannv	2698d 02h	/
7	Typo fix.	yannv	2698d 02h	/
6	Modified to use dual-port RAM for scanline buffers, instead of one RAM per scanline. Note that XST fails to create dual-port RAM if write data on one port is constant! Next step is to use generic_dpram from opencores common.	yannv	4926d 05h	/
5	Add _i and _o suffixes to ports.	yannv	4926d 07h	/
4	Filled in some comments in vector2scanline.v. My very first Verilog module, bear with me.	yannv	4939d 01h	/
3	Unpacked source code for further development in svn.	yannv	4939d 02h	/
2	Added Mercurial bundle of pre-subversion source code.	yannv	4939d 02h	/
1	The project and the structure was created	root	4940d 03h	/