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Rev Log message Author Age Path
10 Added SINGLE_CYCLE parameter for WISHBONE bus cycles rehayes 5664d 19h /
9 fix problem with wb_wacc signal. Old method allowed data to be clocked into register twice. rehayes 5670d 12h /
8 Fix ack signal in testbench rehayes 5670d 13h /
7 Reflection of minor corrections rehayes 5674d 19h /
6 Reflection of minor corrections rehayes 5674d 19h /
5 rehayes 5712d 15h /
4 Initial Release March 14, 2009 - Bob Hayes rehayes 5712d 15h /
3 Initial Release March 14, 2009 - Bob Hayes rehayes 5712d 15h /
2 Initial Release March 14, 2009 - Bob Hayes rehayes 5712d 15h /
1 The project was created and the structure was created root 5713d 06h /

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