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Rev Log message Author Age Path
38 Updated from opencores.org rhoads 8358d 06h /
37 added puts() rhoads 8358d 06h /
36 added count target rhoads 8358d 06h /
35 Count: one, two, three, ... rhoads 8358d 06h /
34 Properly hander missing sections rhoads 8358d 06h /
33 Added isr_enable(?) rhoads 8359d 05h /
32 ld -N; added pi.c rhoads 8359d 05h /
31 Calculate PI rhoads 8359d 05h /
30 fixed LWL and write to 0xffff and other bugs rhoads 8359d 05h /
29 setup $gp and zero bss, fixed a few test bugs rhoads 8359d 05h /
28 setup $gp and zero .sbss and .bss rhoads 8359d 05h /
27 Setup $gp and zero .sbss and .bss rhoads 8359d 05h /
26 Changed to gcc compiler. Strip off first 0x1000 bytes. rhoads 8361d 06h /
25 opcodes target rhoads 8361d 06h /
24 Disable interrupts upon reset. rhoads 8361d 06h /
23 Fixed div -x/y. rhoads 8361d 06h /
22 Switched to gcc compiler. rhoads 8361d 06h /
21 Moved startup to boot.asm rhoads 8361d 06h /
20 Startup code. rhoads 8361d 06h /
19 Changed simili run to 40us. rhoads 8363d 06h /

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