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Rev Log message Author Age Path
72 accurate_timing, cleanup, pipeline rhoads 8197d 17h /
71 removed pause in rhoads 8197d 17h /
70 pipeline rhoads 8197d 17h /
69 Added a third pipeline stage rhoads 8197d 17h /
68 added '\r' and changed temp memory to 0xf80 rhoads 8197d 17h /
67 Added space rhoads 8204d 18h /
66 ELF support rhoads 8205d 21h /
65 ELF format rhoads 8205d 21h /
64 Altera rhoads 8205d 22h /
63 From count.c rhoads 8205d 22h /
62 updated LPM functions; mem_none->mem_fetch rhoads 8205d 22h /
61 mem_none -> mem_fetch rhoads 8205d 22h /
60 reset control rhoads 8205d 22h /
59 Ascyn reset rhoads 8205d 22h /
58 Altera rhoads 8205d 22h /
57 Interface to Altera FPGA rhoads 8205d 22h /
56 Altera, added byte_sel_reg for tigher timing and avoid possible glitches rhoads 8205d 22h /
55 Altera rhoads 8205d 22h /
54 added \r rhoads 8205d 22h /
53 Support small files. rhoads 8205d 22h /

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