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Rev Log message Author Age Path
22 Fix the potato_get_badvaddr() macro skordal 3321d 11h /
21 Upgrade the example design to use a 60 MHz system clock skordal 3321d 11h /
20 Fix SHA256 benchmark crash by storing all registers on exception handler entry

This problem will disappear when the processor is updated to conform to the
new supervisor specification, which will allow us to use a compiler that
conforms to the new "official" ABI.
skordal 3321d 11h /
19 SHA256 benchmark: allow compiler to inline at will skordal 3321d 12h /
18 instr_misalign_check: add do_jump to sensitivity list skordal 3323d 11h /
17 Improve detection of unaligned instructions skordal 3327d 18h /
16 Correct grammar in source code comment skordal 3327d 18h /
15 SHA256 benchmark: fix Makefile syntax error skordal 3334d 11h /
14 Improve detection of invalid instructions skordal 3334d 12h /
13 Add SHA256 benchmark code skordal 3334d 16h /
12 Update example design with correct bug-report URL and testbenches skordal 3334d 19h /
11 Correct FIFO file header skordal 3334d 19h /
10 Add missing FIFO module skordal 3339d 13h /
9 Remove dependency on a non-existent target in the Makefile skordal 3339d 13h /
8 Clarify instruction ROM naming in the example design README skordal 3346d 15h /
7 Add test design for the Nexys 4 board from Digilent skordal 3346d 15h /
6 Add ISA tests skordal 3346d 15h /
5 Update the README, remove .md extension skordal 3348d 21h /
4 Add license skordal 3348d 21h /
3 Fix bug reporting URL skordal 3348d 21h /

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