URL https://opencores.org/ocsvn/potato/potato/trunk

Subversion Repositories potato

[/] - Rev 23

Rev	Log message	Author	Age	Path
23	Create branch to use for implementing a cache	skordal	3552d 09h	/
22	Fix the potato_get_badvaddr() macro	skordal	3552d 10h	/
21	Upgrade the example design to use a 60 MHz system clock	skordal	3552d 10h	/
20	Fix SHA256 benchmark crash by storing all registers on exception handler entry This problem will disappear when the processor is updated to conform to the new supervisor specification, which will allow us to use a compiler that conforms to the new "official" ABI.	skordal	3552d 10h	/
19	SHA256 benchmark: allow compiler to inline at will	skordal	3552d 10h	/
18	instr_misalign_check: add do_jump to sensitivity list	skordal	3554d 10h	/
17	Improve detection of unaligned instructions	skordal	3558d 17h	/
16	Correct grammar in source code comment	skordal	3558d 17h	/
15	SHA256 benchmark: fix Makefile syntax error	skordal	3565d 10h	/
14	Improve detection of invalid instructions	skordal	3565d 11h	/
13	Add SHA256 benchmark code	skordal	3565d 15h	/
12	Update example design with correct bug-report URL and testbenches	skordal	3565d 17h	/
11	Correct FIFO file header	skordal	3565d 18h	/
10	Add missing FIFO module	skordal	3570d 11h	/
9	Remove dependency on a non-existent target in the Makefile	skordal	3570d 11h	/
8	Clarify instruction ROM naming in the example design README	skordal	3577d 14h	/
7	Add test design for the Nexys 4 board from Digilent	skordal	3577d 14h	/
6	Add ISA tests	skordal	3577d 14h	/
5	Update the README, remove .md extension	skordal	3579d 20h	/
4	Add license	skordal	3579d 20h	/