URL https://opencores.org/ocsvn/potato/potato/trunk

Subversion Repositories potato

[/] - Rev 23

Rev	Log message	Author	Age	Path
23	Create branch to use for implementing a cache	skordal	3463d 12h	/
22	Fix the potato_get_badvaddr() macro	skordal	3463d 13h	/
21	Upgrade the example design to use a 60 MHz system clock	skordal	3463d 13h	/
20	Fix SHA256 benchmark crash by storing all registers on exception handler entry This problem will disappear when the processor is updated to conform to the new supervisor specification, which will allow us to use a compiler that conforms to the new "official" ABI.	skordal	3463d 13h	/
19	SHA256 benchmark: allow compiler to inline at will	skordal	3463d 13h	/
18	instr_misalign_check: add do_jump to sensitivity list	skordal	3465d 13h	/
17	Improve detection of unaligned instructions	skordal	3469d 20h	/
16	Correct grammar in source code comment	skordal	3469d 20h	/
15	SHA256 benchmark: fix Makefile syntax error	skordal	3476d 13h	/
14	Improve detection of invalid instructions	skordal	3476d 14h	/
13	Add SHA256 benchmark code	skordal	3476d 18h	/
12	Update example design with correct bug-report URL and testbenches	skordal	3476d 20h	/
11	Correct FIFO file header	skordal	3476d 20h	/
10	Add missing FIFO module	skordal	3481d 14h	/
9	Remove dependency on a non-existent target in the Makefile	skordal	3481d 14h	/
8	Clarify instruction ROM naming in the example design README	skordal	3488d 17h	/
7	Add test design for the Nexys 4 board from Digilent	skordal	3488d 17h	/
6	Add ISA tests	skordal	3488d 17h	/
5	Update the README, remove .md extension	skordal	3490d 22h	/
4	Add license	skordal	3490d 22h	/