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Rev Log message Author Age Path
24 Remove unused STRINGIFY macros skordal 3317d 05h /
23 Create branch to use for implementing a cache skordal 3317d 05h /
22 Fix the potato_get_badvaddr() macro skordal 3317d 05h /
21 Upgrade the example design to use a 60 MHz system clock skordal 3317d 06h /
20 Fix SHA256 benchmark crash by storing all registers on exception handler entry

This problem will disappear when the processor is updated to conform to the
new supervisor specification, which will allow us to use a compiler that
conforms to the new "official" ABI.
skordal 3317d 06h /
19 SHA256 benchmark: allow compiler to inline at will skordal 3317d 06h /
18 instr_misalign_check: add do_jump to sensitivity list skordal 3319d 06h /
17 Improve detection of unaligned instructions skordal 3323d 13h /
16 Correct grammar in source code comment skordal 3323d 13h /
15 SHA256 benchmark: fix Makefile syntax error skordal 3330d 05h /
14 Improve detection of invalid instructions skordal 3330d 06h /
13 Add SHA256 benchmark code skordal 3330d 10h /
12 Update example design with correct bug-report URL and testbenches skordal 3330d 13h /
11 Correct FIFO file header skordal 3330d 13h /
10 Add missing FIFO module skordal 3335d 07h /
9 Remove dependency on a non-existent target in the Makefile skordal 3335d 07h /
8 Clarify instruction ROM naming in the example design README skordal 3342d 09h /
7 Add test design for the Nexys 4 board from Digilent skordal 3342d 09h /
6 Add ISA tests skordal 3342d 10h /
5 Update the README, remove .md extension skordal 3344d 15h /

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