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Rev Log message Author Age Path
29 Add reset functionality for the WB arbiter state machine skordal 3563d 20h /
28 Add rudimentary User's manual skordal 3569d 20h /
27 Prevent exceptions from being taken while stalling skordal 3569d 22h /
26 Prevent exceptions from being taken while stalling

Jumping to an exception handler while stalling and waiting for a load/store
instruction to finish can cause undefined results from the load/store
instruction. This actually fixes the issue mentioned in revision r20.
skordal 3570d 00h /
25 Add placeholder cache modules and a wishbone arbiter skordal 3572d 05h /
24 Remove unused STRINGIFY macros skordal 3572d 18h /
23 Create branch to use for implementing a cache skordal 3572d 18h /
22 Fix the potato_get_badvaddr() macro skordal 3572d 19h /
21 Upgrade the example design to use a 60 MHz system clock skordal 3572d 19h /
20 Fix SHA256 benchmark crash by storing all registers on exception handler entry

This problem will disappear when the processor is updated to conform to the
new supervisor specification, which will allow us to use a compiler that
conforms to the new "official" ABI.
skordal 3572d 19h /
19 SHA256 benchmark: allow compiler to inline at will skordal 3572d 19h /
18 instr_misalign_check: add do_jump to sensitivity list skordal 3574d 19h /
17 Improve detection of unaligned instructions skordal 3579d 02h /
16 Correct grammar in source code comment skordal 3579d 02h /
15 SHA256 benchmark: fix Makefile syntax error skordal 3585d 19h /
14 Improve detection of invalid instructions skordal 3585d 19h /
13 Add SHA256 benchmark code skordal 3586d 00h /
12 Update example design with correct bug-report URL and testbenches skordal 3586d 02h /
11 Correct FIFO file header skordal 3586d 02h /
10 Add missing FIFO module skordal 3590d 20h /

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