OpenCores
URL https://opencores.org/ocsvn/potato/potato/trunk

Subversion Repositories potato

[/] - Rev 32

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
32 Prevent jumping/branching when stalling skordal 3445d 04h /
31 Prevent flushing the pipeline if it is stalling skordal 3445d 05h /
30 Add testcase for a combination of instructions that fail when using cache skordal 3447d 09h /
29 Add reset functionality for the WB arbiter state machine skordal 3450d 04h /
28 Add rudimentary User's manual skordal 3456d 04h /
27 Prevent exceptions from being taken while stalling skordal 3456d 06h /
26 Prevent exceptions from being taken while stalling

Jumping to an exception handler while stalling and waiting for a load/store
instruction to finish can cause undefined results from the load/store
instruction. This actually fixes the issue mentioned in revision r20.
skordal 3456d 09h /
25 Add placeholder cache modules and a wishbone arbiter skordal 3458d 13h /
24 Remove unused STRINGIFY macros skordal 3459d 02h /
23 Create branch to use for implementing a cache skordal 3459d 02h /
22 Fix the potato_get_badvaddr() macro skordal 3459d 03h /
21 Upgrade the example design to use a 60 MHz system clock skordal 3459d 03h /
20 Fix SHA256 benchmark crash by storing all registers on exception handler entry

This problem will disappear when the processor is updated to conform to the
new supervisor specification, which will allow us to use a compiler that
conforms to the new "official" ABI.
skordal 3459d 03h /
19 SHA256 benchmark: allow compiler to inline at will skordal 3459d 03h /
18 instr_misalign_check: add do_jump to sensitivity list skordal 3461d 03h /
17 Improve detection of unaligned instructions skordal 3465d 10h /
16 Correct grammar in source code comment skordal 3465d 10h /
15 SHA256 benchmark: fix Makefile syntax error skordal 3472d 03h /
14 Improve detection of invalid instructions skordal 3472d 04h /
13 Add SHA256 benchmark code skordal 3472d 08h /

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.