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Rev	Log message	Author	Age	Path
33	Ensure correct read of CSR after stall	skordal	3547d 07h	/
32	Prevent jumping/branching when stalling	skordal	3550d 05h	/
31	Prevent flushing the pipeline if it is stalling	skordal	3550d 06h	/
30	Add testcase for a combination of instructions that fail when using cache	skordal	3552d 10h	/
29	Add reset functionality for the WB arbiter state machine	skordal	3555d 05h	/
28	Add rudimentary User's manual	skordal	3561d 05h	/
27	Prevent exceptions from being taken while stalling	skordal	3561d 07h	/
26	Prevent exceptions from being taken while stalling Jumping to an exception handler while stalling and waiting for a load/store instruction to finish can cause undefined results from the load/store instruction. This actually fixes the issue mentioned in revision r20.	skordal	3561d 09h	/
25	Add placeholder cache modules and a wishbone arbiter	skordal	3563d 14h	/
24	Remove unused STRINGIFY macros	skordal	3564d 03h	/
23	Create branch to use for implementing a cache	skordal	3564d 03h	/
22	Fix the potato_get_badvaddr() macro	skordal	3564d 04h	/
21	Upgrade the example design to use a 60 MHz system clock	skordal	3564d 04h	/
20	Fix SHA256 benchmark crash by storing all registers on exception handler entry This problem will disappear when the processor is updated to conform to the new supervisor specification, which will allow us to use a compiler that conforms to the new "official" ABI.	skordal	3564d 04h	/
19	SHA256 benchmark: allow compiler to inline at will	skordal	3564d 04h	/
18	instr_misalign_check: add do_jump to sensitivity list	skordal	3566d 04h	/
17	Improve detection of unaligned instructions	skordal	3570d 11h	/
16	Correct grammar in source code comment	skordal	3570d 11h	/
15	SHA256 benchmark: fix Makefile syntax error	skordal	3577d 04h	/
14	Improve detection of invalid instructions	skordal	3577d 05h	/

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[/] - Rev 33

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