URL https://opencores.org/ocsvn/r2000/r2000/trunk

Subversion Repositories r2000

[/] - Rev 11

Rev	Log message	Author	Age	Path
11	Exception event must be treated CONCURRENTLY with the other event that stall the pipeline.	ameziti	5980d 15h	/
10	Modification of the CP0.	ameziti	5980d 15h	/
9	When D-Cache miss, there's no need to stall MEMWB and freeze WB. The solution is to flush MEMWB only.	ameziti	5980d 15h	/
8	Enhancement of the "Controler specification doc".	ameziti	5983d 15h	/
7	Add Pipeline Controler specification documentation.	ameziti	5984d 13h	/
6	When D-Cache miss, there's no need to stall MEMWB and freeze WB. The solution is to flush MEMWB only.	ameziti	5984d 16h	/
5	Remove the Multiple Arithmetic Unit fonction. - The Pipeline must stall when Mult/Div unit is busy. - Whether there's a mflo or mfhi. - see `define MULTIPLE_ALU	ameziti	5985d 13h	/
4	Add Soc Image in the Specification documentation	ameziti	6006d 15h	/
3	This commit was manufactured by cvs2svn to create tag 'arelease'.		6008d 00h	/
2	First Import the project on the opencores.org CVS server	ameziti	6008d 00h	/
1	Standard project directories initialized by cvs2svn.		6008d 00h	/