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Rev Log message Author Age Path
128 Memblock, for input registers and intermezzo results queues: normfifox26x96 & dpfifo9x64, dpc is done jguarin2002 4717d 01h /
127 Datapath Control
Done
jguarin2002 4717d 13h /
126 dpc: Datapath Control Finished..... test it jguarin2002 4721d 08h /
125 DPC the result is just left jguarin2002 4722d 02h /
124 lost.... jguarin2002 4726d 02h /
123 Datapath Control jguarin2002 4730d 01h /
122 Datapath Control for RaytracFP jguarin2002 4732d 15h /
121 taking out std_logic_arith from sight.... no conversions allowed jguarin2002 4735d 02h /
120 Beta 0 Adder LCELLS 373 jguarin2002 4741d 01h /
119 382 LEs Adder, RTL viewer Check Ok jguarin2002 4741d 07h /
118 fp beta version reached a 17,5% logic cell starting at 450 LEs and finishing in 371 LEs for fadd32 jguarin2002 4741d 14h /
117 Official reduction achieved 12% jguarin2002 4741d 20h /
116 Official Reduction is 7%: Adder 420 logic cells, trying to reach out at least 20 less cells jguarin2002 4741d 21h /
115 Official Reduction is about 7% jguarin2002 4741d 21h /
114 lost of time.. jguarin2002 4742d 20h /
113 Will end this tomorrow for sure.... anyway i dont think i will got something below 400... jguarin2002 4748d 10h /
112 99.7%... almost there jguarin2002 4748d 12h /
111 99% of work done jguarin2002 4748d 21h /
110 Chopchop 99% jguarin2002 4749d 15h /
109 Still working on adder, almost there..... jguarin2002 4750d 09h /

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