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Rev Log message Author Age Path
134 State Machine, for addressing counting, internal writing & reading control and interruption generation jguarin2002 4818d 08h /
133 Added the instructions queue jguarin2002 4820d 00h /
132 There was amiss in the cross product datapath decoder jguarin2002 4823d 19h /
131 Post RTL check on memblock jguarin2002 4824d 02h /
130 RayTrac Internal Memory Blocks among operands registers and Intermediate Results Fifos jguarin2002 4824d 20h /
129 Memory Block:

Identified the four circuits: External Write, External Read, Internal Write, Internal Read.		 jguarin2002 4830d 09h /
128 Memblock, for input registers and intermezzo results queues: normfifox26x96 & dpfifo9x64, dpc is done jguarin2002 4837d 11h /
127 Datapath Control
Done		 jguarin2002 4837d 23h /
126 dpc: Datapath Control Finished..... test it jguarin2002 4841d 18h /
125 DPC the result is just left jguarin2002 4842d 12h /
124 lost.... jguarin2002 4846d 12h /
123 Datapath Control jguarin2002 4850d 12h /
122 Datapath Control for RaytracFP jguarin2002 4853d 01h /
121 taking out std_logic_arith from sight.... no conversions allowed jguarin2002 4855d 13h /
120 Beta 0 Adder LCELLS 373 jguarin2002 4861d 11h /
119 382 LEs Adder, RTL viewer Check Ok jguarin2002 4861d 17h /
118 fp beta version reached a 17,5% logic cell starting at 450 LEs and finishing in 371 LEs for fadd32 jguarin2002 4862d 00h /
117 Official reduction achieved 12% jguarin2002 4862d 06h /
116 Official Reduction is 7%: Adder 420 logic cells, trying to reach out at least 20 less cells jguarin2002 4862d 07h /
115 Official Reduction is about 7% jguarin2002 4862d 07h /

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