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Rev Log message Author Age Path
138 enabled ena on memblock and dpc, also changed the instruction and result memories to queued schemes jguarin2002 4718d 22h /
137 Syncing with enables and eleminated all the register outputs since none block should carry on a register output jguarin2002 4724d 22h /
136 gogogo jguarin2002 4727d 09h /
135 Correction on conectiveness of Datapath Control... jguarin2002 4731d 10h /
134 State Machine, for addressing counting, internal writing & reading control and interruption generation jguarin2002 4733d 05h /
133 Added the instructions queue jguarin2002 4734d 21h /
132 There was amiss in the cross product datapath decoder jguarin2002 4738d 17h /
131 Post RTL check on memblock jguarin2002 4738d 23h /
130 RayTrac Internal Memory Blocks among operands registers and Intermediate Results Fifos jguarin2002 4739d 17h /
129 Memory Block:

Identified the four circuits: External Write, External Read, Internal Write, Internal Read.		 jguarin2002 4745d 06h /
128 Memblock, for input registers and intermezzo results queues: normfifox26x96 & dpfifo9x64, dpc is done jguarin2002 4752d 09h /
127 Datapath Control
Done		 jguarin2002 4752d 20h /
126 dpc: Datapath Control Finished..... test it jguarin2002 4756d 15h /
125 DPC the result is just left jguarin2002 4757d 09h /
124 lost.... jguarin2002 4761d 09h /
123 Datapath Control jguarin2002 4765d 09h /
122 Datapath Control for RaytracFP jguarin2002 4767d 22h /
121 taking out std_logic_arith from sight.... no conversions allowed jguarin2002 4770d 10h /
120 Beta 0 Adder LCELLS 373 jguarin2002 4776d 08h /
119 382 LEs Adder, RTL viewer Check Ok jguarin2002 4776d 14h /

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