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Rev Log message Author Age Path
139 Sync jguarin2002 4883d 15h /
138 enabled ena on memblock and dpc, also changed the instruction and result memories to queued schemes jguarin2002 4888d 07h /
137 Syncing with enables and eleminated all the register outputs since none block should carry on a register output jguarin2002 4894d 07h /
136 gogogo jguarin2002 4896d 18h /
135 Correction on conectiveness of Datapath Control... jguarin2002 4900d 19h /
134 State Machine, for addressing counting, internal writing & reading control and interruption generation jguarin2002 4902d 14h /
133 Added the instructions queue jguarin2002 4904d 06h /
132 There was amiss in the cross product datapath decoder jguarin2002 4908d 02h /
131 Post RTL check on memblock jguarin2002 4908d 08h /
130 RayTrac Internal Memory Blocks among operands registers and Intermediate Results Fifos jguarin2002 4909d 02h /
129 Memory Block:

Identified the four circuits: External Write, External Read, Internal Write, Internal Read.		 jguarin2002 4914d 15h /
128 Memblock, for input registers and intermezzo results queues: normfifox26x96 & dpfifo9x64, dpc is done jguarin2002 4921d 18h /
127 Datapath Control
Done		 jguarin2002 4922d 05h /
126 dpc: Datapath Control Finished..... test it jguarin2002 4926d 00h /
125 DPC the result is just left jguarin2002 4926d 18h /
124 lost.... jguarin2002 4930d 18h /
123 Datapath Control jguarin2002 4934d 18h /
122 Datapath Control for RaytracFP jguarin2002 4937d 07h /
121 taking out std_logic_arith from sight.... no conversions allowed jguarin2002 4939d 19h /
120 Beta 0 Adder LCELLS 373 jguarin2002 4945d 17h /

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