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Rev Log message Author Age Path
145 State machine and counters finishedifconfigifconfigifconfig! Now gather components to obtain RAYTRACifconfigifconfig jguarin2002 4811d 14h /
144 The commented part of DPC was erased, and no longer needed. jguarin2002 4818d 18h /
143 working on result queue sync decoding signals jguarin2002 4823d 10h /
142 Additions for the State Machine jguarin2002 4828d 08h /
141 Syncing: its awful work: input adresses decoded to include the instructions queue also.... jguarin2002 4895d 09h /
140 Syncing: its awful work..... jguarin2002 4895d 15h /
139 Sync jguarin2002 4907d 06h /
138 enabled ena on memblock and dpc, also changed the instruction and result memories to queued schemes jguarin2002 4911d 21h /
137 Syncing with enables and eleminated all the register outputs since none block should carry on a register output jguarin2002 4917d 22h /
136 gogogo jguarin2002 4920d 08h /
135 Correction on conectiveness of Datapath Control... jguarin2002 4924d 09h /
134 State Machine, for addressing counting, internal writing & reading control and interruption generation jguarin2002 4926d 05h /
133 Added the instructions queue jguarin2002 4927d 20h /
132 There was amiss in the cross product datapath decoder jguarin2002 4931d 16h /
131 Post RTL check on memblock jguarin2002 4931d 22h /
130 RayTrac Internal Memory Blocks among operands registers and Intermediate Results Fifos jguarin2002 4932d 16h /
129 Memory Block:

Identified the four circuits: External Write, External Read, Internal Write, Internal Read.		 jguarin2002 4938d 05h /
128 Memblock, for input registers and intermezzo results queues: normfifox26x96 & dpfifo9x64, dpc is done jguarin2002 4945d 08h /
127 Datapath Control
Done		 jguarin2002 4945d 19h /
126 dpc: Datapath Control Finished..... test it jguarin2002 4949d 14h /

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