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Rev Log message Author Age Path
153 last modifications for tb_compiler.py compliance jguarin2002 4599d 06h /
152 Test bench oriented modifications jguarin2002 4603d 07h /
151 Previous Work to generate test benching jguarin2002 4662d 03h /
150 First Beta of RayTrac for a total size of 3874 lcells. Great Result\! jguarin2002 4676d 00h /
149 Results Queue writing signals set on a single standard logic vector rather than in individual bits jguarin2002 4676d 03h /
148 Added an extra stage for the C.D DataPath so it takes the same ammount of clocks to calculate as A.B jguarin2002 4676d 03h /
147 Added Interruption Machine, supporting Result Queue Full and End Of Instruction event notifications. Memblock Adjustments. In the Data Path Control circuit an Interrupt pero Instruction type was decodified. jguarin2002 4678d 16h /
146 Interruption Machine jguarin2002 4686d 10h /
145 State machine and counters finishedifconfigifconfigifconfig! Now gather components to obtain RAYTRACifconfigifconfig jguarin2002 4690d 23h /
144 The commented part of DPC was erased, and no longer needed. jguarin2002 4698d 03h /
143 working on result queue sync decoding signals jguarin2002 4702d 19h /
142 Additions for the State Machine jguarin2002 4707d 18h /
141 Syncing: its awful work: input adresses decoded to include the instructions queue also.... jguarin2002 4774d 19h /
140 Syncing: its awful work..... jguarin2002 4775d 01h /
139 Sync jguarin2002 4786d 15h /
138 enabled ena on memblock and dpc, also changed the instruction and result memories to queued schemes jguarin2002 4791d 06h /
137 Syncing with enables and eleminated all the register outputs since none block should carry on a register output jguarin2002 4797d 07h /
136 gogogo jguarin2002 4799d 18h /
135 Correction on conectiveness of Datapath Control... jguarin2002 4803d 18h /
134 State Machine, for addressing counting, internal writing & reading control and interruption generation jguarin2002 4805d 14h /

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