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196 raytrac+sg_dma+raytrac. Step One, the DPC is transformed. Now there are five instructions (check the design document), theres no full queue sync event, there are only four result queues and only 3 add fp 32 b adders rather than 4. Even it seems like a reduction has taken place, decodification efforts take place when decoding multiplexation from arithmetic blocks towards the resulting queues jguarin2002 4677d 17h /
195 Document advance and changes in the design jguarin2002 4680d 13h /
194 Work In Progress jguarin2002 4695d 19h /
193 WIP: Main Document jguarin2002 4696d 16h /
192 Some change I dont realize what is it in the design document (xls) jguarin2002 4697d 04h /
191 Reduced the implementation of Instruction Queue to 16 instructions rather than 32 and using registers in logic cells rather than M9Ks memory blocks.... finally the design fits. jguarin2002 4697d 04h /
190 M9K Block reduction. And Altera Compiler Directive was added to adder code to prevent unnecesary M9K block inferring... jguarin2002 4701d 12h /
189 Limiting Block size on the operands register to a maximum of 256 jguarin2002 4701d 19h /
188 Fitting Report jguarin2002 4703d 02h /
187 Sopc claims that int is a name that conflicts with verilog or vhdl standards, so a change on the int port was made by renaming it to irq jguarin2002 4703d 02h /
186 Sopc claims that int is a name that conflicts with verilog or vhdl standards, so a change on the int port was made by renaming it to irq jguarin2002 4703d 02h /
185 Well mulblock was a void inside file.... jguarin2002 4703d 16h /
184 Se quitó la palabra capítulo de los titulos de los capítulos. jguarin2002 4703d 20h /
183 Se quitó la palabra capítulo de los titulos de los capítulos. jguarin2002 4703d 20h /
182 Sobre la sincronización del RayTrac al escribir instrucciones y operandos. Pagina 29 y 31. jguarin2002 4703d 20h /
181 Version beta 0.2 previo a conexion con bus avalon en QSYS/SOPC jguarin2002 4704d 04h /
180 Documentos de diseño y documento final jguarin2002 4704d 04h /
179 light change on code readbility for Datapath Control hardware description hdl file jguarin2002 4705d 01h /
178 QSYS SOPC Raytrac component.... jguarin2002 4728d 16h /
177 Interruptions separated in diferent output ports, so we can assign them as interruptions senders.... each one of them..... jguarin2002 4728d 16h /

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