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Rev Log message Author Age Path
50 There's now a descent testbench\!\!\! jguarin2002 5153d 01h /
49 Test bench ifs finally running jguarin2002 5153d 19h /
48 Developing first testbench.... also learning how to do it jguarin2002 5155d 16h /
47 Started making tests, but dont understand quite well the mechanics of Modelsim. Change Arithpack for quicker multiplier and memory instantiation jguarin2002 5157d 04h /
46 simplified memory path jguarin2002 5157d 06h /
45 Magic is already written... now we shall set the testbench on fire\! jguarin2002 5158d 18h /
44 All components in the test bench are now instantiated what is left now is the magic, menaing the test algorithm... also rom memories with crash test dummies are addedsvn add memax.mif memay.mif memaz.mif membx.mif memby.mif membz.mif memcx.mif memcy.mif memcz.mif memdx.mif memdy.mif memdz.mifsvn add memax.mif memay.mif memaz.mif membx.mif memby.mif membz.mif memcx.mif memcy.mif memcz.mif memdx.mif memdy.mif memdz.mif... jguarin2002 5159d 19h /
43 Nothing to say, just working on the Test Bench... jguarin2002 5160d 03h /
42 no comment no tb yet: jguarin2002 5160d 20h /
41 Ram for the massses\!\!\! jguarin2002 5163d 07h /
40 test bench changes..... jguarin2002 5163d 08h /
39 Perhaps its a good idea to have a todo.txt file under version control jguarin2002 5165d 05h /
38 Tb ggodies jguarin2002 5166d 19h /
37 Testbenchgoodies jguarin2002 5166d 20h /
36 testbench for rtengine test jguarin2002 5167d 06h /
35 oops stderr -> stdout, fixed jguarin2002 5167d 06h /
34 No need for .h jguarin2002 5167d 08h /
33 Program to create a MIF (memory initialization file) in order to simulate RtEngine jguarin2002 5170d 19h /
32 carry_logic parameter added to uf entity jguarin2002 5173d 10h /
31 enable signal retaken, and error corrected, a really big mistake jguarin2002 5173d 18h /

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