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Rev Log message Author Age Path
58 Testbenching corrections..... jguarin2002 5108d 04h /
57 testbench verification AWFUL HORRIBLE BAD WRITTEN GREMLIN PROGRAM jguarin2002 5109d 03h /
56 Stop conditions..... jguarin2002 5116d 08h /
55 Unifying Testbench written files format...... jguarin2002 5116d 09h /
54 Unifying Testbench written files format...... jguarin2002 5116d 12h /
53 Improved TRACE_rom_contents.csv presentation jguarin2002 5123d 20h /
52 Working...... jguarin2002 5144d 19h /
51 There's now a descent testbench 2.0\!\!\! jguarin2002 5151d 19h /
50 There's now a descent testbench\!\!\! jguarin2002 5153d 00h /
49 Test bench ifs finally running jguarin2002 5153d 19h /
48 Developing first testbench.... also learning how to do it jguarin2002 5155d 16h /
47 Started making tests, but dont understand quite well the mechanics of Modelsim. Change Arithpack for quicker multiplier and memory instantiation jguarin2002 5157d 03h /
46 simplified memory path jguarin2002 5157d 06h /
45 Magic is already written... now we shall set the testbench on fire\! jguarin2002 5158d 18h /
44 All components in the test bench are now instantiated what is left now is the magic, menaing the test algorithm... also rom memories with crash test dummies are addedsvn add memax.mif memay.mif memaz.mif membx.mif memby.mif membz.mif memcx.mif memcy.mif memcz.mif memdx.mif memdy.mif memdz.mifsvn add memax.mif memay.mif memaz.mif membx.mif memby.mif membz.mif memcx.mif memcy.mif memcz.mif memdx.mif memdy.mif memdz.mif... jguarin2002 5159d 19h /
43 Nothing to say, just working on the Test Bench... jguarin2002 5160d 03h /
42 no comment no tb yet: jguarin2002 5160d 20h /
41 Ram for the massses\!\!\! jguarin2002 5163d 07h /
40 test bench changes..... jguarin2002 5163d 08h /
39 Perhaps its a good idea to have a todo.txt file under version control jguarin2002 5165d 05h /

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