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Subversion Repositories rio

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Rev Log message Author Age Path
26 Temporary checkin of parallelSymbols branch. It does not work yet. magro732 3846d 22h /
25 Correcting compiler errors in TestRioPcsUart.vhd magro732 3853d 15h /
24 Changing errornous use statement. magro732 3853d 16h /
23 Tagging alpha release 2.0.0. magro732 3970d 09h /
22 Tagging release 1.0.0. magro732 3970d 10h /
21 Branching of a single symbol version of the new RioSerial. magro732 3970d 10h /
20 Adding software C-stack and matching VHDL modules. magro732 4035d 12h /
19 Removing synthesis warnings. magro732 4060d 11h /
18 Making RioSerial entity the same as before+minor fixes. magro732 4061d 10h /
17 Removing latch and improving timing. magro732 4062d 11h /
16 Removed FIFO between RioSerial and PCS. Transmitter works without idle ticks. Internal symbol fifo increased. Changed readContentEnd_o timing. magro732 4062d 11h /
15 All testcases are ok. Still needs some tweeks though. magro732 4066d 12h /
14 Most issues solved, testbench issues remains. magro732 4069d 11h /
13 Timeouts are working. magro732 4072d 12h /
12 Backup of recent work, debugging new RioSerial. magro732 4083d 11h /
11 Receiver ready, transmitter is compiling. magro732 4083d 11h /
10 Branch to develop support for parallel symbols. magro732 4083d 11h /
9 Adding the recently written PCS code, which connects the RioSerial to the Virtex-6 GTX-Quad (4-Lane SerDes) azdem 4124d 23h /
8 Adding signal descriptions in comments. magro732 4168d 12h /
7 Adding missing generic parameters to RioPacketBuffer. magro732 4255d 16h /

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