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Subversion Repositories rio

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Rev Log message Author Age Path
26 Temporary checkin of parallelSymbols branch. It does not work yet. magro732 3902d 07h /
25 Correcting compiler errors in TestRioPcsUart.vhd magro732 3909d 01h /
24 Changing errornous use statement. magro732 3909d 01h /
23 Tagging alpha release 2.0.0. magro732 4025d 19h /
22 Tagging release 1.0.0. magro732 4025d 19h /
21 Branching of a single symbol version of the new RioSerial. magro732 4025d 19h /
20 Adding software C-stack and matching VHDL modules. magro732 4090d 21h /
19 Removing synthesis warnings. magro732 4115d 21h /
18 Making RioSerial entity the same as before+minor fixes. magro732 4116d 20h /
17 Removing latch and improving timing. magro732 4117d 20h /
16 Removed FIFO between RioSerial and PCS. Transmitter works without idle ticks. Internal symbol fifo increased. Changed readContentEnd_o timing. magro732 4117d 21h /
15 All testcases are ok. Still needs some tweeks though. magro732 4121d 21h /
14 Most issues solved, testbench issues remains. magro732 4124d 21h /
13 Timeouts are working. magro732 4127d 21h /
12 Backup of recent work, debugging new RioSerial. magro732 4138d 20h /
11 Receiver ready, transmitter is compiling. magro732 4138d 21h /
10 Branch to develop support for parallel symbols. magro732 4138d 21h /
9 Adding the recently written PCS code, which connects the RioSerial to the Virtex-6 GTX-Quad (4-Lane SerDes) azdem 4180d 08h /
8 Adding signal descriptions in comments. magro732 4223d 22h /
7 Adding missing generic parameters to RioPacketBuffer. magro732 4311d 02h /

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