URL https://opencores.org/ocsvn/rio/rio/trunk

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Rev	Log message	Author	Age	Path
30	Changing name tags/1.0.1 to tags/1.0.1-release.	magro732	4080d 03h	/
29	Fixed bug in RioSwitch internal Wishbone interconnects.	magro732	4080d 05h	/
28	Correcting bug in RioSwitch.vhd internal Wishbone interconnect. Modifying an existing test case in TestRioSwitch.vhd to provoke the error.	magro732	4080d 05h	/
27	Adding missing code to single-symbol pipelined transmitter. Not tested nor copiled.	magro732	4081d 16h	/
26	Temporary checkin of parallelSymbols branch. It does not work yet.	magro732	4242d 04h	/
25	Correcting compiler errors in TestRioPcsUart.vhd	magro732	4248d 21h	/
24	Changing errornous use statement.	magro732	4248d 22h	/
23	Tagging alpha release 2.0.0.	magro732	4365d 15h	/
22	Tagging release 1.0.0.	magro732	4365d 16h	/
21	Branching of a single symbol version of the new RioSerial.	magro732	4365d 16h	/
20	Adding software C-stack and matching VHDL modules.	magro732	4430d 18h	/
19	Removing synthesis warnings.	magro732	4455d 17h	/
18	Making RioSerial entity the same as before+minor fixes.	magro732	4456d 16h	/
17	Removing latch and improving timing.	magro732	4457d 17h	/
16	Removed FIFO between RioSerial and PCS. Transmitter works without idle ticks. Internal symbol fifo increased. Changed readContentEnd_o timing.	magro732	4457d 17h	/
15	All testcases are ok. Still needs some tweeks though.	magro732	4461d 18h	/
14	Most issues solved, testbench issues remains.	magro732	4464d 17h	/
13	Timeouts are working.	magro732	4467d 18h	/
12	Backup of recent work, debugging new RioSerial.	magro732	4478d 17h	/
11	Receiver ready, transmitter is compiling.	magro732	4478d 17h	/

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[/] - Rev 30

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