URL https://opencores.org/ocsvn/rio/rio/trunk

Subversion Repositories rio

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Rev	Log message	Author	Age	Path
37	singleSymbol: Correcting compiler errors and misc minor errors.	magro732	3719d 18h	/
36	singleSymbol: Adding testbench for RioLogicalCommon.	magro732	3726d 17h	/
35	Temporary checkin of new synchronous RioSerial. Does not work yet. Temporary checkin of RioLogicalCommon. Does not work yet.	magro732	3729d 23h	/
34	Adding first version of logical egress.	magro732	3733d 17h	/
33	Adding common logical layer module.	magro732	3734d 22h	/
32	branches/singleSymbol Adding a wait-state to only insert one control-symbol into an outbound packet.	magro732	3738d 01h	/
31	Fixing compiler errors. Adding support for inserting control-symbols from receiver into frames.	magro732	3740d 02h	/
30	Changing name tags/1.0.1 to tags/1.0.1-release.	magro732	3740d 04h	/
29	Fixed bug in RioSwitch internal Wishbone interconnects.	magro732	3740d 05h	/
28	Correcting bug in RioSwitch.vhd internal Wishbone interconnect. Modifying an existing test case in TestRioSwitch.vhd to provoke the error.	magro732	3740d 05h	/
27	Adding missing code to single-symbol pipelined transmitter. Not tested nor copiled.	magro732	3741d 17h	/
26	Temporary checkin of parallelSymbols branch. It does not work yet.	magro732	3902d 04h	/
25	Correcting compiler errors in TestRioPcsUart.vhd	magro732	3908d 22h	/
24	Changing errornous use statement.	magro732	3908d 22h	/
23	Tagging alpha release 2.0.0.	magro732	4025d 16h	/
22	Tagging release 1.0.0.	magro732	4025d 16h	/
21	Branching of a single symbol version of the new RioSerial.	magro732	4025d 16h	/
20	Adding software C-stack and matching VHDL modules.	magro732	4090d 18h	/
19	Removing synthesis warnings.	magro732	4115d 18h	/
18	Making RioSerial entity the same as before+minor fixes.	magro732	4116d 17h	/

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[/] - Rev 37

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