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Rev Log message Author Age Path
104 - Added missing signal dmem_data_in. cwalter 6485d 04h /
103 - Added simulation for memory to behavioral.
- Added empty mif file for memory.		 cwalter 6485d 04h /
102 changed data pitch ustadler 6487d 09h /
101 - Signals for memory block where not always set. This resulted in a latch. cwalter 6487d 09h /
100 - Signal clear_in was missing in sensitivity list. cwalter 6487d 09h /
99 - Fixed problem with barrel shifter input signals where a latch has been
synthesized.		 cwalter 6487d 09h /
98 - Applied indenting tool. cwalter 6487d 09h /
97 Fixed bug: only set branch and clear signals if branch is actually executed. jlechner 6487d 10h /
96 - SR register is now computed in ALU stage. cwalter 6487d 11h /
95 - Write back now only updates SR in case of a LOAD. cwalter 6487d 11h /
94 Added signal from ex stage to register lock unit for clearing all register locks
when a branch is executed.		 jlechner 6487d 11h /
93 Changed behavior on branch. Current PC is immeadiately taken from ex stage alu result. jlechner 6487d 11h /
92 Added logic for inserting a nop instruction when the pipeline is cleared. jlechner 6487d 11h /
91 - Computed new SR values from ALU result. cwalter 6487d 11h /
90 Added output signal for clearing all register locks when a branch instruction is executed.
This is necessary because the id stage could have locked registers for an instruction
that is cleared out of the pipeline due to the branch.		 jlechner 6487d 11h /
89 Added input signal for clearing all register locks. jlechner 6487d 12h /
88 - Added new patch for assembler. cwalter 6487d 12h /
87 no message cwalter 6487d 12h /
86 - Added new example for a more complex loop. cwalter 6487d 12h /
85 Removed PC reset on clear_in signal. Clear_in only comes together with a branch, so it is sufficient
branch immediately.		 jlechner 6487d 14h /

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