URL https://opencores.org/ocsvn/s1_core/s1_core/trunk

Subversion Repositories s1_core

[/] - Rev 16

Rev	Log message	Author	Age	Path
16	Added the 3 new defines to make the design: - synthesizable for FPGA - single-threaded - without the cryptographic SPU unit	fafa1971	6458d 15h	/
15	Removed the remove of CVS subdirs...	fafa1971	6458d 15h	/
14	Now the ACCESSES file perfectly documents the list of instructions fetched both by the T1 and the S1, and the difference is shown. To obtain the disassembled code the "disass" tool (under tools/opt) has been used.	fafa1971	6509d 07h	/
13	Added first version of small tool to reverse engineer the boot code used by the T1.	fafa1971	6518d 09h	/
12	Updated the PCX/CPX fields description with all the info required for debugging.	fafa1971	6519d 00h	/
11	Corrected the bug about the packet format, now we are near to perfection...	fafa1971	6519d 03h	/
10	First version.	fafa1971	6540d 00h	/
9	First release.	fafa1971	6540d 00h	/
8	First release.	fafa1971	6540d 01h	/
7	First version.	fafa1971	6540d 01h	/
6	First version (from OpenSPARC 1.1.3).	fafa1971	6540d 01h	/
5	Removed backup file.	fafa1971	6540d 01h	/
4	First version.	fafa1971	6540d 01h	/
3	First release.	fafa1971	6540d 01h	/
2	First revision.	fafa1971	6540d 01h	/
1	Standard project directories initialized by cvs2svn.		6540d 01h	/