URL https://opencores.org/ocsvn/s1_core/s1_core/trunk

Subversion Repositories s1_core

[/] - Rev 50

Filtering Options

From rev	To rev	Max revs

Search for

Rev	Log message	Author	Age	Path
50	Changed library paths for XST from macrocell to behav.	fafa1971	6390d 14h	/
49	Now supports 3 versions: S1 Core ME/SE/EE.	fafa1971	6397d 15h	/
48	Updated with new OpenSPARC 1.4 list	fafa1971	6439d 05h	/
47	Updated with `define preprocessing for Xilinx XST synthesis	fafa1971	6439d 05h	/
46	Fresh version from OpenSPARC 1.4 and Icarus define preprocessing	fafa1971	6439d 05h	/
45	I'm going to remove original OpenSPARC 1.4 files so that I can insert again the ones with Icarus Verilog preprocessor already applied by update_sparccore (it seems that Xilinx's XST does NOT support defines at compile time)	fafa1971	6439d 05h	/
44	Embedded `defines into Verilog source since did not find command line option for XST	fafa1971	6440d 04h	/
43	Added welcome message as a remainder to set paths for tools!=IVerilog	fafa1971	6440d 04h	/
42	Added support for filelist for Xilinx ISE XST synthesis	fafa1971	6440d 04h	/
41	Added copy of empty modules upon original SPARC copies	fafa1971	6440d 04h	/
40	First version of synthesis script for Xilinx ISE XST	fafa1971	6440d 04h	/
39	Empty modules for cacheless Simply RISC S1 Core	fafa1971	6440d 04h	/
38	Changed to compile (for now) the boot code.	fafa1971	6444d 03h	/
37	Memory image coming from the new boot.s	fafa1971	6444d 03h	/
36	Working boot code!!!	fafa1971	6444d 03h	/
35	Fixed Assembly comments ("//" had to become "!!").	fafa1971	6444d 03h	/
34	This file is useless.	fafa1971	6453d 11h	/
33	Added inclusion of defines.h in boot.s	fafa1971	6454d 03h	/
32	First version of cutdown boot code for SPARC V9.	fafa1971	6454d 03h	/
31	Removed list of formerly dirty signals, to improve waveforms readability.	fafa1971	6454d 05h	/

1 2 Next >

Show All

Browse

Tools

Subversion Repositories s1_core

[/] - Rev 50

Filtering Options