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Rev Log message Author Age Path
84 Again, used module names instead than instance names in bottom-up synthesis approach. fafa1971 6130d 18h /
83 Decreased clock frequency from 250 to 200 MHz. fafa1971 6137d 14h /
82 DC synthesis script modified according to the fabolous manual (RTFM...). fafa1971 6148d 14h /
81 Sorry, I made a mistake in the waveform of the clock! fafa1971 6148d 17h /
80 Hyerarchical report_area. fafa1971 6151d 13h /
79 Relaxed timing, added flatten and hyerarchical report_area. fafa1971 6151d 13h /
78 Relaxed timing and added flatten command. fafa1971 6151d 13h /
77 Now includes comments (in Italian!) fafa1971 6236d 11h /
76 Changed again from DB export to DDC export fafa1971 6251d 10h /
75 Changed preprocessing for DC synthesis fafa1971 6251d 14h /
74 Updated filelists. fafa1971 6251d 14h /
73 New version of scripts for DC and to compile boot code fafa1971 6251d 15h /
72 Modified RAM address from 0x400C0 to 0x4C000 fafa1971 6257d 22h /
71 Added check for S1_ROOT set (suggested by lain.ux) fafa1971 6258d 22h /
70 Again, the setup file is linked rather than copied fafa1971 6266d 07h /
69 Now contains also the other file fafa1971 6266d 07h /
68 Merged with the DC setup file fafa1971 6266d 07h /
67 Now uses XG/Tcl syntax fafa1971 6268d 07h /
66 Modified to use XG syntax fafa1971 6268d 07h /
65 Version with undisclosed library names fafa1971 6268d 07h /

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