| Rev |
Log message |
Author |
Age |
Path |
| 18 |
Added a picture of the device pinouts to the specification. |
dgisselq |
3123d 12h |
/ |
| 17 |
Modifications necessary to find some bugs, and to load the flash with an ELF
file. |
dgisselq |
3123d 12h |
/ |
| 16 |
Bug fix. This release fixes several bugs associated with transitioning from
user mode to supervisor mode while running from flash memory. This also
rewires TIMER-B into a watch-dog timer, and adjusts the LED's to be an
indicator of interrupts and whether or not the CPU has stalled or not as well. |
dgisselq |
3123d 12h |
/ |
| 15 |
Adds a new program and a new device: doorbell2 and the PmodCLS display. This
also includes a real-time clock simulator--since we couldn't fit it on the
board. |
dgisselq |
3129d 05h |
/ |
| 14 |
Modified the loader so that it will load even if there are RAM variables
in the load, just as long as they aren't anything but zero. (The startup code,
however, doesn't clear memory to match--so be sure to initialize all variables.) |
dgisselq |
3129d 05h |
/ |
| 13 |
Fixed a nasty parameter problem between toplevel and txuart. The UART
transmitter now both works (again), and properly generates the required
interrupts. This also finishes the fixes to the alternate toplevel file,
alttop.v, that should've been fixed in the last release. |
dgisselq |
3129d 05h |
/ |
| 12 |
The UART and PWM audio now work. This includes the changes to make that
happen, as well as the source code for some UART and PWM demo programs. |
dgisselq |
3130d 03h |
/ |
| 11 |
Runs on hardware now! Added proper pinouts, pipelined wishbone command
interface sufficient for loading the flash, a loader to load the flash,
and verified that they work. |
dgisselq |
3131d 01h |
/ |
| 10 |
Added the capability to run ELF files natively, fully processing the ELF format. |
dgisselq |
3131d 01h |
/ |
| 9 |
Added pinout diagrams, based upon a (hopefully) final UCF file. |
dgisselq |
3131d 01h |
/ |
| 8 |
First pseudo-running version. The alternate configuration (not the main one)
has been initially tested. wbregs works for reading/writing registers,
so it is now possible to test the peripherals. |
dgisselq |
3136d 02h |
/ |
| 7 |
Created/added an initial specification. Updated/corrected several copywrite
notices. |
dgisselq |
3136d 17h |
/ |
| 6 |
Initial UCF modifications. Pin layout still isn't complete, but I'm starting
to work it. |
dgisselq |
3157d 12h |
/ |
| 5 |
These two are my first attempt(s) at a secondary project file, one that can
run as an alternate to the main file but that gives more access to the hardware,
such as programming access to the flash. |
dgisselq |
3157d 12h |
/ |
| 4 |
Lots of updates, as part of actually making this work on hardware. Not there
yet, so this is still pre-alpha. |
dgisselq |
3157d 12h |
/ |
| 3 |
Updated date. |
dgisselq |
3157d 12h |
/ |
| 2 |
The initial check in--all the files that will make this SoC work. |
dgisselq |
3168d 07h |
/ |
| 1 |
The project and the structure was created |
root |
3168d 08h |
/ |
