URL https://opencores.org/ocsvn/sdhc-sc-core/sdhc-sc-core/trunk

Subversion Repositories sdhc-sc-core

[/] - Rev 111

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Rev	Log message	Author	Age	Path
111	Sclk moved to neg. edge -> setup and hold times for fast mode are easier to reach. (only micro sd does not work in fast mode).	rkastl	5053d 00h	/
110	All except microsd work in highspeed mode.	rkastl	5053d 00h	/
109	Added a data ram.	rkastl	5053d 00h	/
108	Added a ram to the testbed	rkastl	5053d 00h	/
107	Forgot to add Counter in last commit.	rkastl	5053d 00h	/
106	Fixes #29: All cards respond, but they do not all work.	rkastl	5053d 00h	/
105	Changing speed works! refs #33	rkastl	5053d 00h	/
104	SdController: Configuration ready to switch to high speed, refs #33	rkastl	5053d 00h	/
103	SdController: Checking speed works	rkastl	5053d 00h	/
102	SdController: Enabling wide mode works, refs #33	rkastl	5053d 00h	/
101	Receiving response to ACMD51 works including data, refs #33.	rkastl	5053d 00h	/
100	SdController: Receiving data after ACMD51, but CRC is wrong	rkastl	5053d 00h	/
99	SdController: Checking bus width without receiving data response	rkastl	5053d 00h	/
98	SdController: Receive response to CMD7 (except when busy is activated)	rkastl	5053d 00h	/
97	SdController: CMD55 out of main state into Region	rkastl	5053d 00h	/
96	SdController: Region extracted from main state, select card in config state	rkastl	5053d 00h	/
95	SdController: entity and architecture split, all outputs registered SdCardModel: Delay between response and next command added SdData: Busy checking refs #33	rkastl	5053d 00h	/
94	CmdTimeout (8 Clocks) added, SdData inserted into top, refs #31	rkastl	5053d 00h	/
93	Don´t run a full synthesis for SdData alone. It won´t fit.	rkastl	5053d 00h	/
92	SdData: Sending in standard and wide mode (incl. simple not automated testbench and synthesis), refs #31.	rkastl	5053d 01h	/

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Subversion Repositories sdhc-sc-core

[/] - Rev 111

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