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181 Refs #60.

Fix synthesis with seperate WbClkDomain.
rkastl 5057d 09h /
180 Moved WbClkDomain to its own unit.
Refs #60.
rkastl 5057d 09h /
179 Fixing build:
Added library generation to Makefile.
rkastl 5057d 09h /
178 Fixed regression:
Testbenches did not support synchronous reset.
rkastl 5057d 09h /
177 Split SdTop into SdClkDomain and SdTop. Refs #60. rkastl 5057d 09h /
176 Thesis:
Conclusion

Fixes #53,#61.
rkastl 5057d 09h /
175 Thesis:

Fixes #45.
rkastl 5057d 09h /
174 Thesis:
System integration

Fixes #51.
rkastl 5057d 10h /
173 Thesis:
Started with SdController description.

Refs #38.
rkastl 5057d 10h /
172 Thesis:
wbclockdomain: refactored and finished.

Fixes #39.
rkastl 5057d 10h /
171 Worked on wishbone part of thesis.

Refs #37.
Refs #39.
rkastl 5057d 10h /
170 License rewritten to BSD rkastl 5057d 10h /
169 +sdc file for timing analysis rkastl 5057d 10h /
168 TbdSd synthesis script reaches timing constraints. rkastl 5057d 10h /
167 Read+Modify+Write works on HW

+ Fixed CRC status token (not mentioned in simplified spec)
+ Improved TestWbMaster to RMW
rkastl 5057d 10h /
166 tbTbdSd: fixed rkastl 5057d 10h /
165 Only use synchronous high active reset in SDHC-SC-Core. rkastl 5057d 10h /
164 Headers updated (LGPL, consistent format) rkastl 5057d 10h /
163 Header-Skript supports writing to file and infile replacement. rkastl 5057d 10h /
162 Script for generating headers created. rkastl 5057d 10h /

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