URL https://opencores.org/ocsvn/simple_fm_receiver/simple_fm_receiver/trunk

Subversion Repositories simple_fm_receiver

[/] - Rev 22

Rev	Log message	Author	Age	Path
22	Update last bit output assignment method.	arif_endro	5990d 07h	/
21	This commit was manufactured by cvs2svn to create tag 'version_1_1'.		7175d 08h	/
20	New Version	arif_endro	7175d 08h	/
19	Screen shot from chipscope analyzer view, this is how this design work.	arif_endro	7181d 06h	/
18	This bit files generates better wave than previous (i.e. more smooth)	arif_endro	7181d 09h	/
17	Initial Checkin	arif_endro	7189d 06h	/
16	Changes constan and minor fix	arif_endro	7192d 09h	/
15	Xilinx FPGA XC2V2000 bit files the first version.	arif_endro	7195d 07h	/
14	* empty log message *	arif_endro	7200d 05h	/
13	Update License	arif_endro	7211d 06h	/
12	Update License Change reset signal handle	arif_endro	7211d 06h	/
11	Update License Change reset signal handle	arif_endro	7211d 06h	/
10	Added script for generating cos ROM.	arif_endro	7221d 09h	/
9	Added documentation	arif_endro	7238d 08h	/
8	This commit was manufactured by cvs2svn to create tag 'okinawa_1'.		7252d 09h	/
7	To view chipscope exported output using ModelSim waveform window	arif_endro	7252d 09h	/
6	Added Xilinx FPGA implementation (e.g. connector to ILA, ICON, and VIO)	arif_endro	7253d 10h	/
5	Added interface in/out and testing paralelly (e.g. square and triangular)	arif_endro	7253d 10h	/
4	Fix elsif and if statement	arif_endro	7256d 04h	/
3	This commit was manufactured by cvs2svn to create tag 'VSFR_1'.		7259d 11h	/