URL https://opencores.org/ocsvn/spdif_interface/spdif_interface/trunk

Subversion Repositories spdif_interface

[/] - Rev 29

Rev	Log message	Author	Age	Path
29	Wishbone bus cycle decoder.	gedra	7422d 06h	/
28	Delint'ed and changed name of architecture.	gedra	7426d 14h	/
27	Alternate dual port memory implementation for Altera FPGA's.	gedra	7427d 05h	/
26	Fixed a few bugs.	gedra	7429d 05h	/
25	Changed status reg. declaration	gedra	7429d 05h	/
24	Added channel status decoding.	gedra	7429d 05h	/
23	Added frame decoder	gedra	7429d 05h	/
22	Renamed generic	gedra	7432d 06h	/
21	Renamed generic's and modified recevier configuration register	gedra	7432d 06h	/
20	Renamed generic and cleaned some lint's	gedra	7432d 06h	/
19	Added frame decoder and sample extractor	gedra	7432d 06h	/
18	Frame decoder and sample extractor	gedra	7432d 06h	/
17	Cleaned up lint warnings.	gedra	7435d 05h	/
16	Added dual port ram.	gedra	7436d 05h	/
15	Generic dual port ram model.	gedra	7436d 05h	/
14	Receiver component declarations.	gedra	7438d 06h	/
13	Cleaned up lint warnings.	gedra	7439d 08h	/
12	Simple test bench for rx_phase_det.vhd.	gedra	7439d 08h	/
11	Early version of the bi-phase mark decoder.	gedra	7439d 08h	/
10	Recevier status register	gedra	7440d 07h	/