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Rev Log message Author Age Path
54 Improved test bench package. gedra 7442d 18h /
53 Fixed bug. gedra 7444d 18h /
52 Changed address of channel status buffers. gedra 7444d 18h /
51 Changed two interrupts in the transmitter. gedra 7445d 16h /
50 Added string type casting to make ModelSim happy. gedra 7446d 17h /
49 Changed write signal for status buffers. gedra 7447d 17h /
48 Added new components. gedra 7447d 17h /
47 Transmitter channel status buffer. gedra 7447d 17h /
46 Transmitter version register. gedra 7447d 18h /
45 Transmitter component declarations. gedra 7448d 17h /
44 Transmitter Wishbone bus cycle decoder. gedra 7448d 17h /
43 This commit was manufactured by cvs2svn to create tag 'rx_beta_1'. 7449d 18h /
42 Fixed bug with lock event generation. gedra 7449d 18h /
41 Test bench update. gedra 7449d 18h /
40 Improved test bench. gedra 7450d 19h /
39 Bug-fix. gedra 7450d 19h /
38 Signal renaming and bug fix. gedra 7464d 19h /
37 Converted to numeric_std and fixed a few bugs. gedra 7465d 21h /
36 Top level entity for receiver. gedra 7465d 21h /
35 Top level test bench for receiver. NB! Not complete. gedra 7465d 21h /

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