OpenCores
URL https://opencores.org/ocsvn/spi/spi/trunk

Subversion Repositories spi

[/] - Rev 22

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
22 This commit was manufactured by cvs2svn to create tag 'asyst_2'. 7797d 19h /
21 Byte selects changed. simons 7797d 19h /
20 This commit was manufactured by cvs2svn to create tag 'rel_6'. 7799d 00h /
19 Errors fixed. simons 7799d 00h /
18 This commit was manufactured by cvs2svn to create tag 'rel_5'. 7801d 21h /
17 Define mess fixed. simons 7801d 21h /
16 This commit was manufactured by cvs2svn to create tag 'rel_4'. 7802d 00h /
15 Defines set in order. simons 7802d 00h /
14 This commit was manufactured by cvs2svn to create tag 'rel_3'. 7802d 18h /
13 8-bit WB access enabled. simons 7802d 18h /
12 Error fixed. simons 7823d 01h /
11 This commit was manufactured by cvs2svn to create tag 'rel_2'. 7841d 00h /
10 Slave select signal generation bug fixed, default case added when reading registers, to avoid latches. simons 7841d 00h /
9 Support for 128 bits character length added. Zero value divider bug fixed. simons 7881d 18h /
8 Automatic slave select signal generation added. simons 7901d 19h /
7 Support for 64 bit caharacter len added. simons 7990d 07h /
6 This commit was manufactured by cvs2svn to create tag 'rel_1'. 8158d 10h /
5 Document lectured. simons 8158d 10h /
4 PDF created. simons 8188d 01h /
3 This commit was manufactured by cvs2svn to create tag 'initial'. 8188d 19h /

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.