OpenCores
URL https://opencores.org/ocsvn/t48/t48/trunk

Subversion Repositories t48

[/] - Rev 138

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
138 Fix for:
P1 constantly in push-pull mode in t8048		 arniml 7268d 22h /
137 add link to COMPILE_LIST arniml 7306d 10h /
136 initial check-in arniml 7306d 10h /
135 add bug
PSENn Timing		 arniml 7310d 20h /
134 Fix bug report:
"PSENn Timing"
PSEN is now only asserted for the second cycle if explicitely
requested by assert_psen_s.
The previous implementation asserted PSEN together with RD or WR.		 arniml 7311d 06h /
133 add checks for PSEN arniml 7311d 06h /
132 stop simulation upon assertion error arniml 7311d 06h /
131 update arniml 7311d 06h /
130 initial check-in arniml 7311d 06h /
129 cleanup copyright notice arniml 7373d 14h /
128 counter_q is not cleared during reset
this would match all different descriptions of the Counter as
a) if the software assumes that the Counter is modified during reset, it
will initialize the Counter anyhow
b) the special case 'Counter not modified during reset' is covered		 arniml 7380d 18h /
127 + log status of A11 properly during interrupt routines
+ trigger counter on negative edge of T1 instead of positive edge		 arniml 7380d 19h /
126 + specify hex file for external ROM on i8039 command line
+ support for no_dump_compare file in test cell		 arniml 7380d 19h /
125 exclude from dump compare arniml 7380d 19h /
124 fix wrong handling of MB after return from interrupt arniml 7381d 16h /
123 support hex file for external ROM arniml 7381d 16h /
122 test MB after return from interrupt arniml 7381d 16h /
121 update bug description for
Program Memory bank can be switched during interrupt		 arniml 7384d 09h /
120 Fix bug report:
"Program Memory bank can be switched during interrupt"
int module emits int_in_progress signal that is used inside the decoder
to hold mb low for JMP and CALL during interrupts		 arniml 7384d 09h /
119 add int_in_progress_o to entity of int module arniml 7384d 09h /

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.