URL https://opencores.org/ocsvn/t48/t48/trunk

Subversion Repositories t48

[/] - Rev 221

Rev	Log message	Author	Age	Path
221	new input xtal_en_i	arniml	6686d 23h	/
220	new input xtal_en_i	arniml	6687d 00h	/
219	new input xtal_en_i gates xtal_i base clock	arniml	6687d 00h	/
218	simplifications	arniml	6773d 07h	/
217	update for release 0.6.1 beta	arniml	6842d 03h	/
216	assign clk_i to outclock	arniml	6904d 03h	/
215	suppress p2_output_pch_o when MOVX operation is accessing the external memory	arniml	6904d 03h	/
214	fix sensitivity list	arniml	6911d 05h	/
213	properly drive P1 and P2 with low impedance markers	arniml	6916d 01h	/
212	add bug reports "Problem when INT and JMP" "P2 Port value restored after expander access"	arniml	6916d 03h	/
211	wire signals for P2 low impedance marker issue	arniml	6917d 03h	/
210	entity changes for P2 low impedance marker issue	arniml	6917d 03h	/
209	entity changes for P2 low impedance issue	arniml	6917d 03h	/
208	wire signals for P2 low impeddance marker issue	arniml	6917d 03h	/
207	entity changes for P2 low impedance trigger issue	arniml	6917d 03h	/
206	* change low impedance markers for P2 separate marker for low and high part * p2_o output is also registered to prevent combinational output to pads	arniml	6917d 03h	/
205	operate ale_q and int_q with xtal_i after shift of ALE assertion to XTAL3	arniml	6917d 03h	/
204	* suppress p2_output_pch_o when p2_output_exp is active * wire xtal_i to interrupt module	arniml	6917d 03h	/
203	* shift assertion of ALE and PROG to xtal3 * correct change of revision 1.8	arniml	6917d 03h	/
202	fix address assignment	arniml	6917d 03h	/