URL https://opencores.org/ocsvn/t48/t48/trunk

Subversion Repositories t48

[/] - Rev 25

Rev	Log message	Author	Age	Path
25	initial check-in	arniml	7502d 18h	/
24	connect control signal for Port 2 expander	arniml	7503d 02h	/
23	rework Port 2 expander handling	arniml	7503d 02h	/
22	merge MN_ANLD, MN_MOVD_PP_A and MN_ORLD_PP_A to OUTLD_PP_A	arniml	7503d 02h	/
21	implement mnemonics: + MOVD_A_PP + OUTD_PP_A -> ANLD PP, A; MOVD PP, A; ORLD PP, A	arniml	7503d 02h	/
20	move code for PROG out of if-branch for xtal3_s	arniml	7503d 02h	/
19	enhance simulation result string	arniml	7504d 17h	/
18	fix constant format	arniml	7504d 17h	/
17	fix test	arniml	7504d 17h	/
16	fix header	arniml	7504d 17h	/
15	initial check-in	arniml	7505d 16h	/
14	initial check-in	arniml	7505d 17h	/
13	This commit was manufactured by cvs2svn to create tag 'transfer'.		7505d 17h	/
12	Imported sources	arniml	7505d 17h	/
11	add description	arniml	7505d 17h	/
10	put ext_ram on falling clock edge to sample the write enable proberly	arniml	7506d 16h	/
9	initial check-in	arniml	7506d 16h	/
8	initial check-in	arniml	7506d 18h	/
7	initial check-in	arniml	7506d 18h	/
6	moved to system directory	arniml	7506d 18h	/