OpenCores
URL https://opencores.org/ocsvn/t48/t48/trunk

Subversion Repositories t48

[/] - Rev 296

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
296 maintenance release for svn updates arniml 5511d 01h /
295 - remove unsupported CVS tags
- propset for Id
arniml 5568d 03h /
294 Added old uploaded documents to new repository. root 5590d 07h /
293 Added old uploaded documents to new repository. root 5590d 13h /
292 New directory structure. root 5590d 13h /
291 remove t48_opc_decoder component reference arniml 5902d 01h /
290 remove obsolete components arniml 5903d 03h /
289 This commit was manufactured by cvs2svn to create tag 'rel_1_1'. 5904d 00h /
288 updates for release 1.1 arniml 5904d 00h /
287 add notes on FPGA implementation arniml 5904d 00h /
286 hierarchy update, RAM and ROM clarification arniml 5904d 00h /
285 generate D for synchronous implementation in clocked process arniml 5905d 01h /
284 better support for ISE/XST:
opc_table and opc_decoder merged into decoder_pack and decoder
arniml 5905d 01h /
283 update to new mnemonic decoder arniml 5905d 01h /
282 decouple bidir port T0 from P1
fixes testcase black_box/tx/t0
arniml 5906d 01h /
281 clarify testcase compilation arniml 5906d 01h /
280 added syn directory structure arniml 5907d 00h /
279 update arniml 5921d 23h /
278 initial check-in arniml 5922d 01h /
277 This commit was manufactured by cvs2svn to create tag 'rel_1_0'. 6402d 23h /

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.