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Rev Log message Author Age Path
337 t8022 synthesis arniml 693d 02h /
336 docs arniml 693d 03h /
335 simplify up41 test setup arniml 693d 06h /
334 fix timing of sel_an*, rad arniml 693d 17h /
333 add t8022 arniml 693d 23h /
332 mcs2x tests arniml 694d 19h /
331 release 1.3 arniml 695d 01h /
330 add t8021 arniml 695d 01h /
329 start work on t2x arniml 695d 19h /
328 prepare 1.3 arniml 697d 21h /
327 update integration manual arniml 698d 18h /
326 refine status_q update arniml 698d 23h /
325 experimental upi41_db_bus variant with asynchronous master interface arniml 699d 06h /
324 enhance access timing in test bench arniml 699d 06h /
323 - prevent change when master reads status
- relax master access timing
arniml 700d 05h /
322 hold db_dir_o during entire access arniml 701d 20h /
321 improve compatibility with modelsim and ghdl arniml 702d 18h /
320 improve in test arniml 702d 18h /
319 - add dma test
- update dma logic
arniml 704d 20h /
318 t8042ah synth, fix warnings arniml 705d 01h /

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