URL https://opencores.org/ocsvn/t48/t48/trunk

Subversion Repositories t48

[/] - Rev 57

Rev	Log message	Author	Age	Path
57	abort if no interrupt occurs	arniml	7517d 03h	/
56	wait for instruction strobe after final end-of-simulation detection this ensures that the last mov instruction is part of the dump and enables 100% matching with i8039 simulator	arniml	7518d 04h	/
55	add dependency to tb_behav_pack for decoder	arniml	7518d 04h	/
54	- add tb_istrobe_s	arniml	7518d 04h	/
53	make istrobe visible through testbench package	arniml	7518d 04h	/
52	+ fix bug in PSW[3] + read SP properly for dump	arniml	7518d 04h	/
51	+ implement Port1 and Port2 + connect T0 and T1 + return proper program memory contents	arniml	7518d 04h	/
50	This commit was manufactured by cvs2svn to create tag 'import'.		7523d 05h	/
49	Imported sources	arniml	7523d 05h	/
48	update copyright notice	arniml	7523d 05h	/
47	initial check-in	arniml	7523d 05h	/
46	fix test	arniml	7525d 02h	/
45	remove unused signals	arniml	7525d 02h	/
44	default assignment for aux_carry_o	arniml	7525d 04h	/
43	fix sensitivity list	arniml	7526d 04h	/
42	change test values that match better to the test case	arniml	7526d 06h	/
41	expand PATH	arniml	7526d 06h	/
40	rework adder and force resource sharing between ADD, INC and DEC	arniml	7526d 06h	/
39	initial check-in	arniml	7528d 10h	/
38	add measures to implement XCHD	arniml	7528d 10h	/