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Subversion Repositories t6507lp

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Rev Log message Author Age Path
250 Synthesis script changed creep 5673d 12h /
249 Renamed the synthesis script creep 5674d 08h /
248 Added a low power synthesis script creep 5679d 07h /
247 Added the cpu mapped verilog creep 5679d 07h /
246 Added some older files plus the first syn script creep 5680d 11h /
245 Added a few dirs for the synthesis creep 5680d 11h /
244 Added a few dirs for the synthesis creep 5680d 12h /
243 Fixing STA_IDY bug creep 5722d 04h /
242 Bug regardind the STA_IDY opcode creep 5722d 08h /
241 Fixed half the problem with strange STA behavior. creep 5723d 07h /
240 Finally fixed the decimal mode! creep 5723d 09h /
239 Zero flag fixed for SBC while in Decimal Mode. Bug #34. gabrieloshiro 5723d 10h /
238 ALU file is linted. creep 5726d 07h /
237 Added a preliminary collision detection logic. creep 5727d 08h /
236 Added the video converter testbench to the repository. creep 5727d 11h /
235 Bug #60: added a brief simulation to the video_converter module. creep 5728d 05h /
234 SBC Decimal mode 100% verified. creep 5733d 07h /
233 ADC and SBC are 100% verified in regular mode. Decimal mode still missing. creep 5733d 11h /
232 New video test. creep 5735d 05h /
231 Minor bugs fixed. gabrieloshiro 5735d 06h /

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