URL https://opencores.org/ocsvn/tv80/tv80/trunk

Subversion Repositories tv80

[/] - Rev 89

Rev	Log message	Author	Age	Path
89	RTL and environment fixes for nmi bug	ghutchis	5376d 22h	/
88	Fixed bug introduced by conversion of mcycle to one-hot FSM	ghutchis	5378d 13h	/
87	Added additional ifdef signals to remove unneede R (refresh) register	ghutchis	5393d 21h	/
86	Added old uploaded documents to new repository.	root	5617d 03h	/
85	Added old uploaded documents to new repository.	root	5617d 08h	/
84	New directory structure.	root	5617d 08h	/
83	Some fixes from Guy-- replace case with casex.	hharte	5690d 15h	/
82	Clean up spacing	hharte	5700d 11h	/
81	Initial version of TV80 Wishbone Wrapper	hharte	5700d 11h	/
80	Misc. code clean-up on mcode to make code smaller and (hopefully) more readable.	ghutchis	6799d 23h	/
79	Added JR self-checking test	ghutchis	6799d 23h	/
78	Hajime Ishitani pointed out missing invert on cs_n signal	ghutchis	6843d 01h	/
77	Added back files lost after server crash	ghutchis	6874d 19h	/
76	This commit was manufactured by cvs2svn to create tag 'rel_1_0'.		6954d 01h	/
75	Modified environment I/O so multicycle wr_n signals are only seen as a single write.	ghutchis	6954d 01h	/
74	Changed default for T2Write to be 1, to match expected behavior for most users.	ghutchis	6954d 02h	/
73	Added RC4 encrypt/decrypt test	ghutchis	6965d 21h	/
72	Added copyright header	ghutchis	6965d 21h	/
71	Ported UART from T80	ghutchis	7027d 00h	/
70	Added test for T16450 UART	ghutchis	7077d 19h	/