URL https://opencores.org/ocsvn/tv80/tv80/trunk

Subversion Repositories tv80

[/] - Rev 97

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Rev	Log message	Author	Age	Path
97	Added data in mux, added 16450 UART to environment	ghutchis	5472d 12h	/
96	Added Z80 op decode to environment, enabled by -k switch	ghutchis	5472d 18h	/
95	Updated regression script to use SystemC simulation	ghutchis	5474d 13h	/
94	Ported over env_io.v from Verilog environment to tv_responder. Basic tests from Verilog environment (hello, fib) now passing in SystemC environment.	ghutchis	5476d 14h	/
93	Added common header file for all systemc environment	ghutchis	5477d 12h	/
92	Added responder to top level, beginning of support for ihex load	ghutchis	5481d 14h	/
91	Preliminary support for SystemC/Verilator environment	ghutchis	5481d 16h	/
90	Fixed syntax errors in core preventing Verilator from compiling. Added new capability to register generator to make registers which latch on an external event. Removed spurious copyright notice.	ghutchis	5481d 16h	/
89	RTL and environment fixes for nmi bug	ghutchis	5501d 19h	/
88	Fixed bug introduced by conversion of mcycle to one-hot FSM	ghutchis	5503d 10h	/
87	Added additional ifdef signals to remove unneede R (refresh) register	ghutchis	5518d 17h	/
86	Added old uploaded documents to new repository.	root	5741d 23h	/
85	Added old uploaded documents to new repository.	root	5742d 05h	/
84	New directory structure.	root	5742d 05h	/
83	Some fixes from Guy-- replace case with casex.	hharte	5815d 11h	/
82	Clean up spacing	hharte	5825d 07h	/
81	Initial version of TV80 Wishbone Wrapper	hharte	5825d 08h	/
80	Misc. code clean-up on mcode to make code smaller and (hopefully) more readable.	ghutchis	6924d 20h	/
79	Added JR self-checking test	ghutchis	6924d 20h	/
78	Hajime Ishitani pointed out missing invert on cs_n signal	ghutchis	6967d 21h	/

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Subversion Repositories tv80

[/] - Rev 97

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