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Rev Log message Author Age Path
99 Fixed setting of flags for LD A, I and LD A, R instructions

Added new testcase ivec_flags to cover new opcodes
ghutchis 5126d 07h /
98 Changed malloc for strings with constant length copy, add assertion checks for
null pointers in env memory, and fixed some formatting
ghutchis 5471d 00h /
97 Added data in mux, added 16450 UART to environment ghutchis 5475d 04h /
96 Added Z80 op decode to environment, enabled by -k switch ghutchis 5475d 09h /
95 Updated regression script to use SystemC simulation ghutchis 5477d 05h /
94 Ported over env_io.v from Verilog environment to tv_responder.
Basic tests from Verilog environment (hello, fib) now passing in
SystemC environment.
ghutchis 5479d 05h /
93 Added common header file for all systemc environment ghutchis 5480d 04h /
92 Added responder to top level, beginning of support for ihex load ghutchis 5484d 05h /
91 Preliminary support for SystemC/Verilator environment ghutchis 5484d 07h /
90 Fixed syntax errors in core preventing Verilator from compiling.
Added new capability to register generator to make registers which
latch on an external event. Removed spurious copyright notice.
ghutchis 5484d 07h /
89 RTL and environment fixes for nmi bug ghutchis 5504d 10h /
88 Fixed bug introduced by conversion of mcycle to one-hot FSM ghutchis 5506d 01h /
87 Added additional ifdef signals to remove unneede R (refresh) register ghutchis 5521d 09h /
86 Added old uploaded documents to new repository. root 5744d 15h /
85 Added old uploaded documents to new repository. root 5744d 21h /
84 New directory structure. root 5744d 21h /
83 Some fixes from Guy-- replace case with casex. hharte 5818d 03h /
82 Clean up spacing hharte 5827d 23h /
81 Initial version of TV80 Wishbone Wrapper hharte 5827d 23h /
80 Misc. code clean-up on mcode to make code smaller and (hopefully)
more readable.
ghutchis 6927d 11h /

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