OpenCores
URL https://opencores.org/ocsvn/uart16550/uart16550/trunk

Subversion Repositories uart16550

[/] - Rev 87

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
87 This fixes errors in some cases when data is being read and put to the FIFO at the same time. Patch is submitted by Scott Furman. Update is very recommended. gorban 8010d 17h /
86 restored include for uart_defines.v in uart_test.v gorban 8280d 21h /
85 Updated documentation to include latest changes. gorban 8314d 13h /
84 The uart_defines.v file is included again in sources. gorban 8327d 13h /
83 Reverted to include uart_defines.v file in other files again. gorban 8327d 13h /
82 Updated to work with latest core. gorban 8334d 11h /
81 Added lastest additions. gorban 8334d 11h /
80 Remove uart_fifo.v because it is replaced by other 2 files. gorban 8334d 11h /
79 Bug Fixes:
* Possible loss of sync and bad reception of stop bit on slow baud rates fixed.
Problem reported by Kenny.Tung.
* Bad (or lack of ) loopback handling fixed. Reported by Cherry Withers.

Improvements:
* Made FIFO's as general inferrable memory where possible.
So on FPGA they should be inferred as RAM (Distributed RAM on Xilinx).
This saves about 1/3 of the Slice count and reduces P&R and synthesis times.

* Added optional baudrate output (baud_o).
This is identical to BAUDOUT* signal on 16550 chip.
It outputs 16xbit_clock_rate - the divided clock.
It's disabled by default. Define UART_HAS_BAUDRATE_OUTPUT to use.
gorban 8334d 11h /
78 This commit was manufactured by cvs2svn to create tag 'rel_1'. 8487d 17h /
77 This commit was manufactured by cvs2svn to create tag 'asyst_3'. 8487d 17h /
76 This commit was manufactured by cvs2svn to create tag 'asyst_2'. 8487d 17h /
75 Endian define added. Big Byte Endian is selected by default. mohor 8487d 17h /
74 tf_overrun signal was disabled since it was not used gorban 8492d 18h /
73 major bug in 32-bit mode that prevented register access fixed. gorban 8499d 18h /
72 UART PHY added. Files are fully operational, working on HW. mohor 8513d 01h /
71 Removed confusing comment gorban 8524d 14h /
70 tf_pop was too wide. Now it is only 1 clk cycle width. mohor 8529d 22h /
69 More than one character was stored in case of break. End of the break
was not detected correctly.
mohor 8538d 13h /
68 lsr[7] was not showing overrun errors. mohor 8541d 21h /

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2025 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.