URL https://opencores.org/ocsvn/uart16550/uart16550/trunk

Subversion Repositories uart16550

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Rev	Log message	Author	Age	Path
93	Testbench with complete selfchecking. BUG is that THRE status is set at the end of last sent bit when TX FIFO is empty instead when only TX FIFO gets empty. This causes testcases not to finish.	tadejm	7416d 23h	/
92	This is revision 1.4, revision 1.5 was put there by mistake.	simons	7530d 16h	/
91	Removed files due to new complete testbench.	tadejm	7531d 07h	/
90	Add Flextronics header	avisha	7533d 14h	/
89	adjusted comment + define	dries	7613d 19h	/
88	added clearing the receiver fifo statuses on resets	gorban	7676d 08h	/
87	This fixes errors in some cases when data is being read and put to the FIFO at the same time. Patch is submitted by Scott Furman. Update is very recommended.	gorban	7706d 10h	/
86	restored include for uart_defines.v in uart_test.v	gorban	7976d 14h	/
85	Updated documentation to include latest changes.	gorban	8010d 06h	/
84	The uart_defines.v file is included again in sources.	gorban	8023d 06h	/
83	Reverted to include uart_defines.v file in other files again.	gorban	8023d 06h	/
82	Updated to work with latest core.	gorban	8030d 03h	/
81	Added lastest additions.	gorban	8030d 04h	/
80	Remove uart_fifo.v because it is replaced by other 2 files.	gorban	8030d 04h	/
79	Bug Fixes: * Possible loss of sync and bad reception of stop bit on slow baud rates fixed. Problem reported by Kenny.Tung. * Bad (or lack of ) loopback handling fixed. Reported by Cherry Withers. Improvements: * Made FIFO's as general inferrable memory where possible. So on FPGA they should be inferred as RAM (Distributed RAM on Xilinx). This saves about 1/3 of the Slice count and reduces P&R and synthesis times. * Added optional baudrate output (baud_o). This is identical to BAUDOUT* signal on 16550 chip. It outputs 16xbit_clock_rate - the divided clock. It's disabled by default. Define UART_HAS_BAUDRATE_OUTPUT to use.	gorban	8030d 04h	/
78	This commit was manufactured by cvs2svn to create tag 'rel_1'.		8183d 10h	/
77	This commit was manufactured by cvs2svn to create tag 'asyst_3'.		8183d 10h	/
76	This commit was manufactured by cvs2svn to create tag 'asyst_2'.		8183d 10h	/
75	Endian define added. Big Byte Endian is selected by default.	mohor	8183d 10h	/
74	tf_overrun signal was disabled since it was not used	gorban	8188d 11h	/

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Subversion Repositories uart16550

[/] - Rev 93

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