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Rev Log message Author Age Path
23 Inlined dongle spesific Uspp code to dongle.py script separate Uspp is no longer needed.
Forced serial port to hw flow control mode.
Added support for new dongle HW code 5 to support fast read and fast write modes		 nuubik 6110d 12h /
22 Inlined dongle spesific Uspp code to dongle.py script separate Uspp is no longer needed nuubik 6110d 12h /
21 This commit was manufactured by cvs2svn to create tag 'version_1_4'. 6123d 15h /
20 Fix'ed TAR cycle second part this is not critical update nuubik 6123d 15h /
19 Fix'ed cycle type init code copy/pase mistake nuubik 6123d 16h /
18 Fixed in reset init of some trigers (this should not have generated extra hardware in FPGA but just to be on the safe side) nuubik 6124d 16h /
17 changed version code to 04 and added spy mode by puting jumpers on header and also implemented LPC Firmware Hub read to enable this booting mode (selectable by header jumper see documentation) nuubik 6124d 16h /
16 Synchronisation with OpenCores release nuubik 6257d 13h /
15 changed version code to 03 and disabled spy mode on juper setting 00 (this disabled booting but postcode IO write was displayed) nuubik 6374d 16h /
14 added comment on POR time influence when booting from LPC dongle nuubik 6386d 15h /
13 This commit was manufactured by cvs2svn to create tag 'SoftVersion_1_1'. 6488d 09h /
12 Added windows py bindings check with nice info print with link to installer nuubik 6488d 09h /
11 one ; in line end possible runtime error nuubik 6488d 09h /
10 fixed a typo nuubik 6492d 06h /
9 Made failing on port open retry nuubik 6492d 07h /
8 Added PCB level test options nuubik 6492d 14h /
7 Fixed pin modes and resyntesized nuubik 6492d 14h /
6 Fixed Cyclon part no in datasheets and drawings nuubik 6529d 12h /
5 This commit was manufactured by cvs2svn to create tag 'HWVersion_1_0'. 6555d 07h /
4 Changed LED SM front to falling to avoid large current switches at the same time as data nuubik 6555d 07h /

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