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URL https://opencores.org/ocsvn/v586/v586/trunk

Subversion Repositories v586

[/] - Rev 105

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Rev Log message Author Age Path
105 migration nexys ddr ultro 3103d 18h /
104 iadd rstgen and clk wiard for ddr nexys4 TOP ultro 3110d 18h /
103 commit top for 128mbyte nexys4 ddr version ultro 3120d 07h /
102 committed 128mbytes boot code for nexys4 ddr ultro 3120d 07h /
101 add ddr interface mig7 xilinx xci ip ultro 3120d 21h /
100 add crossbar for nexys4 ddr with 128megabyte ram window ultro 3120d 21h /
99 remove phy_intn from xdc constraints as it is not used inside design wi th etherlite. ultro 3162d 05h /
98 update tbench and add mii to rmii converter ip from xilinx ultro 3162d 15h /
97 update periph and TOP ultro 3162d 15h /
96 update periph , uart is not inside ultro 3162d 16h /
95 update boot.mem accordingly to test.s cleanup ultro 3164d 19h /
94 clean up test.s ultro 3164d 19h /
93 added stub for keyboard ultro 3165d 07h /
92 added doc ultro 3165d 09h /
91 update netlists cosmetics ultro 3165d 21h /
90 updated cosmetic periph.v ultro 3165d 22h /
89 add 3x rtl files ultro 3165d 23h /
88 remove axi ip standalone ultro 3165d 23h /
87 update rtl for boot.mem ultro 3165d 23h /
86 update tbench ultro 3165d 23h /

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