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Rev Log message Author Age Path
18 ADDR and DATA width set to 8 resp 32 unneback 5384d 00h /
17 based on updated versatile counter unneback 5387d 22h /
16 changed power of two style unneback 5651d 08h /
15 doc updated
gray_counter_defines added
dual port RAM updated
unneback 5655d 02h /
14 added PDF unneback 5699d 08h /
13 adr update unneback 5700d 10h /
12 no mux on dual port mem read unneback 5713d 04h /
11 name conflict
wptr1 changed to wptr1_cnt etc
unneback 5713d 06h /
10 rptr2 unneback 5713d 08h /
9 unneback 5719d 03h /
8 unneback 5719d 03h /
7 unneback 5719d 03h /
6 unneback 5719d 06h /
5 async compare for fifo full and empty unneback 5719d 06h /
4 unneback 5719d 10h /
3 unneback 5719d 11h /
2 unneback 5719d 11h /
1 The project was created and the structure was created root 5721d 06h /

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